Fundamentals of Mixed Signal Testing

The Basics
Objectives
Scientific / Engineering Notation
Voltage
Current
Resistance
Using Ohm's Law to Verify Device Specifications
Digital Numbers
Digital Logic

Overview of Semiconductors and ATE
Objectives
Wafers, Dice and Packages
ATE - Automated Test Equipment
Semiconductor Technologies
Digital and Analog Circuits
Types of ATE Systems
Tester Load boards
Wafer Probing
Probe Cards
Device Handlers
Temperature Forcing Units

Introduction to Test
Objectives
The Bottom Line
Basic Terms
Environmental Testing
Voltage Stress
Shake and Bake
Why Test?
Defects
What is The Correct Way to Test?
What will be Tested?
Binning
Program Flow
Test Summary
Traceability

Test System Architecture
Objectives
Basic Terms
The Test System
What's in a Test System?
Control Functions
DC Instrumentation
Functional/AC Instrumentation
Mechanical
Software
Basic Guidelines

Device Specifications
Objectives
Basic Terms
The Design Specification
The Test Specification
The Device Specification
Test Conditions and Limits
Parameters that Apply to DC Parametric Testing
Parameters that Apply to Functional and AC Testing
Logical Functions
Reading Device Specifications
256 x 4 RAM Specifications
Interpreting the Device Specification
Device Specifications and Test Conditions
Workbook Exercise

Opens and Shorts - PMU Method
Objectives
Why Test for Opens and Shorts?
Opens and Shorts Serial Static
Datalogs and Troubleshooting

Verifying DC Parameters
Objectives
Basic Terms
DC Tests and the Hidden Resistance
Ohm's Law
VOH/IOH
VOL/IOL
IDD Gross Current
IDD Static Current
IDDQ Current
IDD Dynamic Current
Input Currents (IIL/IIH)
Resistive Inputs-Pull-ups and Pull-downs
Output Fanout
High Impedance Currents (IOZL/IOZH)
Input Clamp (VI)
Output Short Circuit Current (IOS)

Verifying Functional Parameters
Objectives
Basic Terms
Introduction to Functional Testing
The Test Cycle
Input Data
Input Signal Formats
Developing Input Signal Timings
Output Data
Testing Outputs
Testing Valid (L/H) Output Levels
Output Testing using an Edge Strobe
Output Testing using a Window Strobe
Testing High Impedance (Z-state) Output Levels
Output Current Loading
Developing Output Strobe Timing
Output Loading for AC Tests
Vector Data
Functional Specifications
Gross Functional Tests
Equation Based Timing
Functionally Testing a Device
Sample Device Specification
Specification Test Conditions for the Clocked Inverter
Gross Functional Test Conditions for the Clocked Inverter
Test Program Statements for Clocked Inverter
Standard Functional Tests
Opens and Shorts - Functional Method
VIL/VIH
VOL/IOL VOH/IOH Functional Test
Resistive Output Loading
Input/Output Levels Relationship
Functional Z-State - High Impedance Testing
Open Drain / Open Source Outputs

Testing AC Parameters
Objectives
AC Parametric Testing
Read & Record
Go-Nogo Testing
Compromises
Standard AC Parameters
Rise Time
Fall Time
Setup Time
Hold Time
Propagation Delay Measurements
Minimum Pulse Widths
Maximum Frequency
Output Enable Time
Output Disable Time
AC Specifications from 256 x 4 Static RAM Data Sheet
Developing Functional Timing
Write Cycle Timing
Read Cycle Timing

Design for Testability
Objectives
Design For Testability and Functional Testing
Fault Models
Fault Coverage
Stuck-At Fault Analysis
What is DFT?
Scan Design
Boundary Scan (JTAG) IEEE 1149.1
Boundary Scan Architecture
Boundary Scan Register Functions
Boundary Scan Register Logic
Built In Self Test (BIST)
DFT and ATE Considerations

Device Characterization
Objectives
Characterization Overview
Test Vectors and Characterization
Defining Characterization Parameters
Common Characterization Parameters
Use of Test System Tools
The Test System Datalogger
The Linear Search
The Binary Search
Binary Search - Input Timings
Binary Search - Output Timings
Threshold/Level Search
Shmoo Plots

Test Vector Development
Objectives
Test Vectors
Example Vector File
Working with the Design Engineer
Creating Vectors by Hand
Tester Options (Memory Considerations)
Test Vector Examples
Simulation Data
Simulation for Test

Test Program Development Issues
Objectives
What is the Primary Purpose of the Test Program?
Other Considerations
Initializing the Program
Verifying the Test Setup
Power-on Sequencing
Power-off Sequencing

Creating a Test Program
Objectives
Developing the Test Plan from the Device Specification
Designing the Test Hardware
Writing the Test Program
Load board Tests
Tester Diagnostics
Running the Program the First Time
Verifying the Functional Test Setup
A Brief Discussion on Test Vectors
Troubleshooting
Objectives
Where to Begin
Example: IIL/IIH Test Failures
Debug Tools

Qualifying and Documenting the Program
Objectives
Qualification
Verify testing on handlers and probers
Documenting the Test Program

CMOS Device Latch-up
Objectives:
What is Latch-up?
Latch-up Testing
Test Patterns
Test Procedure Summary
Applying Test Stimulus

Glossary
Answers to Review Questions
Index

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