Fundamentals of Digital Semiconductor Testing Text The Test Engineer's Reference Manual

*** Updated July 2007 ***

Soft Test offers a complete reference book which details the concepts and techniques used in testing digital semiconductors. DC, AC, Functional, and Structural tests are explained in detail. Various test methods are discussed and illustrated along with the advantage and disadvantage of each method.

The "Hows and Whys" of each DC test are explained. Included are datalog examples showing possible pass / fail conditions and a trouble shooting guide outlines the steps needed to identify and solve problems related to each individual test.

Device specifications, device characterization, yield analysis, debug techniques, datalogs, shmoo plots and many more topics are explained in detail.

To keep current with the latest developments in Digital Semiconductor Testing, a number of new topics have been added. These topics included Structural Test, Defect Oriented Testing, Fault Coverage, Design-for-Testability (DFT), Scan, BIST, Boundary Scan (JTAG), and IDDQ. Many other topics have also been updated.

The Virtual PMU (VPMU) is now included on CD-ROM with the purchase of each book. The VPMU is a Flash based simulator that runs under Windows XP and Vista. It simulates programming and executing DC parametric tests and is used to reinforce your understanding of each test procedure. The VPMU consists of 11 exercises. Each exercise requires you to correctly program the VPMU based upon the device specification and the defined test procedure. Test results are displayed based upon the simulator hardware settings. The test passes when correctly programmed, otherwise it fails and incorrect settings are indicated. Programming the VPMU is very similar to setting the test conditions on most popular test systems.

This book is designed to be a "Cook Book" for Test, Product and Applications Engineers and it's packed full of all the information you need. The Fundamentals of Digital Semiconductor Testing condenses many years of test engineering experience into a single reference.

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