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Digital Testing Knowledge Evaluation
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Print this and answer the questions below. If you miss more than 3, then you are a good candidate for this course.

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Match the terms with the definitions below

A: Bi-directional

B: Static

C: VREF/VCOM

D: DPS

E: IOH

F: Preconditioning

G: Dynamic

H: VIL

I: Binning

J: Hold Time

K: Wafer Test

L: Setup Time

M: Pin Electronics

N: Comparators

O: IDD

P: VOL

Q: IOL

R: VDDMAX

1. The minimum amount of time that input data must be held constant after a reference signal reaches a predefined voltage point.

2. A means of categorizing or sorting tested devices into their appropriate groupings.

3. Setting a device into the proper logic state so that a test may then be performed.

4. The parameter which defines the maximum acceptable power supply current consumption of a MOS device.

5. The maximum voltage which may be applied to an input pin when applying a logic zero.

6. A type of device pin that functions as an input, an output and is also capable of achieving a high impedance state.

7. Circuitry located in the test head used to supply input signals to the device under test and to receive output signals from the device under test.

8. This term indicates that the device under test is actively changing logic states.

9. The reference voltage associated with the dynamic current loads, used to control the switching point of IOL and IOH currents.

10. The parameter which defines the minimum current that an output must source when driving a logic one.

Select the correct answer for the questions below

11. When Performing a functional opens and shorts test, the current is forced by:

1. The PMU
2. The programmable current loads
3. Voltage is forced, not current
4. None of the above

12. When Performing the VOH test, the current forced during the test is:
1. A positive current
2. A negative current
3. a or b
4. None of the above

13. The IIL/IIH test verifies:
1 . Input capacitance
2 . Input voltage threshold levels
3. Input buffer impedance
4. Power impedance between VDD and VSS

14. When the device specifications defines VDD as 3.0V +/- 5%, the value of VDDMIN is:
1. 3.15 volts
2. 3.00 volts
3. 2.85 volts
4. It depends on the technology (TTL or CMOS)

15. The VIL/VIH specifications are verified by executing:
1. A DC test
2. A functional test
3. An AC test
4. No test, these parameters are guaranteed by design

16. The Output Strobe timing marker may be programmed as:
1. An Edge Strobe or Box Strobe
2. A Level Strobe or Sine Strobe
3. A Box Strobe or Window Strobe
4 . An Edge Strobe or Window Strobe

17. Propagation measurements are only made on outputs:
1. True
2. False

18. The output enable parameter verifies the transition time of an output changing from driving valid logic levels to a high impedance state.
1. True
2. False

19. Frequency specifications must be converted to specific cycle or period values for verification on digital test systems.
1. True
2. False

20. A linear search typically executes slower than a binary search
1. True
2. False

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Soft Test Inc.
P.O. Box 2230
New Smyrna Beach, Fl 32169
Phone: 386-478-1979
FAX: 386-478-1760
http://www.soft-test.com