Biography

Rich Anderson - Sandia Labs 

Rich has been the manager of the Sandia National Labs Failure Analysis group for twenty years. The group has excelled in world contributions for techniques for FA. Rich won a Best Paper Award in 1994 from the IRPS. 
 

 Test Engineering Series

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Today’s Test and Product Engineers are regularly involved with DFT enabled chip designs, but the details of DFT test methodologies often remain a mystery. Design for Testability courses have been offered in the past, but most focus primarily on circuit design – not Test. This course has been developed specifically for engineers involved with component test of digital IC’s.

Defect Oriented Test, Fault Models, ATPG, Structural Test, Reduced Pin Count Test and Iddq are just some of the topics covered. The course material will enhance your current knowledge and you will likely find that you can put into practice what you learn immediately. This DFT Fundamentals Course is designed to provide a foundation of knowledge that will enable you to take full advantage of the benefits associated with DFT technology.

The Course
Lecture begins with a brief discussion of existing test issues and a first look at DFT. Next, Fault Models and Automatic Test Pattern Generation (ATPG) is covered. This provides the framework for understanding Scan Vector Patterns, Delay Tests, and Pattern debug.

 DC and AC Scan are explained in detail, including DFT Structures, Test Strategies, and Timing Sequences. Boundary Scan 1149.1 (JTAG) is explained in similar detail, followed by an in-depth discussion of Built-In Self Test (BIST) for Memory and Logic circuits.

The procedures and benefits of Reduced Pin Count Test are explored along with IOBIST and Vector Compression. The course concludes with a comparison of DFT ATE to more traditional ATE. This illustrates the strength of DFT, particularly in the area of identifying problems and trouble-shooting using ATE software tools. For more details of what is included in the course please see the attached Course Outline.

Who should attend
Test and Product Engineers, Engineering Managers, Sales Engineers, Field Service Engineers and Maintenance Technicians have all benefited from this course.

When, Where & Cost
Soft Test offers training services at our Sunnyvale CA facility on a regular basis and we also offer on-site training at your facility. Tuition is $795 per attendee and includes all course material. Give us a call for additional information and class schedules or visit our web site at www.soft-test.com 

Class Registration
Registration is available on-line at our web site or contact the East Coast sales office at 386 478-1979. Email inquires to Click Here To Write Us!

Summary
Test engineering is typically learned on the job, but in the case of DFT the more subtle issues are best addressed directly with lecture and examples. Get a head start now by attending our DFT-Test-Focused 2-day course.

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